
puts "Start to source [info script]"

global SLR0_DPU_V3_TOP


set_property LOC  URAM288_X0Y0 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y1 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y0 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y1 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y4 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y5 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y4 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y5 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y8 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y9 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y8 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y9 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y12 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y13 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y12 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y13 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y20 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y21 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y20 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y21 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y25 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y26 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y25 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y26 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y30 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y31 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y30 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y31 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y3 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y4 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y11 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y12 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y2 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y3 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y2 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y3 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y6 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y7 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y6 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y7 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y10 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y11 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y10 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y11 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y14 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y15 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y14 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y15 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y22 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y23 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y22 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y23 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y27 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y28 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y27 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y28 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y0 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y1 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y8 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y9 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y5 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y6 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y13 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y14 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y16 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y16 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y17 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y17 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y18 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y18 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y19 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y19 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y24 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y24 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y29 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y29 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y2 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y10 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y7 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y15 [get_cells $SLR0_DPU_V3_TOP/core_array[0].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y32 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y33 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y32 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y33 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y36 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y37 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y36 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y37 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y40 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y41 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y40 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y41 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y44 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y45 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y44 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y45 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y52 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y53 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y52 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y53 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y57 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y58 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y57 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y58 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y62 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y63 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y62 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y63 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y35 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y36 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y43 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y44 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y34 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y35 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y34 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y35 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y38 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y39 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y38 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y39 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y42 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y43 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y42 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y43 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y46 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y47 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y46 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y47 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y54 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y55 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y54 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y55 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y59 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y60 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y59 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y60 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y32 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y33 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y40 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y41 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y37 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y38 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y45 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y46 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y48 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y48 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y49 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y49 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y50 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y50 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y51 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y51 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y56 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y56 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y61 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y61 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y34 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y42 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y39 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y47 [get_cells $SLR0_DPU_V3_TOP/core_array[1].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y32 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y33 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y32 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y33 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y36 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y37 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y36 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y37 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y40 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y41 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y40 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y41 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y44 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y45 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y44 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y45 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y52 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y53 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y52 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y53 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y57 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y58 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y57 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y58 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y62 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y63 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y62 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y63 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y51 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y52 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y59 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y60 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y34 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y35 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y34 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y35 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y38 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y39 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y38 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y39 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y42 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y43 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y42 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y43 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y46 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y47 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y46 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y47 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y54 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y55 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y54 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y55 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y59 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X0Y60 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X1Y59 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X1Y60 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y48 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y49 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y56 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y57 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y53 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y54 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y61 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y62 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X0Y48 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y48 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y49 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y49 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y50 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y50 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y51 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y51 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y56 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y56 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X0Y61 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X1Y61 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y50 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y58 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y55 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y63 [get_cells $SLR0_DPU_V3_TOP/core_array[2].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y0 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y1 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y0 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y1 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y4 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y5 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y4 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y5 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y8 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y9 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y8 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y9 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y12 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y13 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y12 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y13 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y20 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y21 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y20 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y21 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y25 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y26 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y25 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y26 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y30 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y31 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y30 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y31 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y19 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y20 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y27 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y28 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[0].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y2 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y3 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y2 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y3 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[0].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y6 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y7 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y6 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y7 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[1].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y10 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y11 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y10 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y11 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[2].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y14 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y15 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y14 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y15 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[3].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y22 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y23 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y22 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y23 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[4].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y27 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X3Y28 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X4Y27 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X4Y28 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[5].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y16 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y17 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y24 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y25 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[6].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X2Y21 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_0]
set_property LOC  URAM288_X2Y22 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_left_1]
set_property LOC  URAM288_X2Y29 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_0]
set_property LOC  URAM288_X2Y30 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[1].gen_large.u_buf_ram_bank_grp_i/gen_banks[7].gen_large.u_buf_ram_bank_128bx8k_1r1w1c_i/URAM288_right_1]
set_property LOC  URAM288_X3Y16 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y16 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[0].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y17 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y17 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[1].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y18 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y18 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[2].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y19 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y19 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[3].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y24 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y24 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[4].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X3Y29 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X4Y29 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[5].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y18 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y26 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[6].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
set_property LOC  URAM288_X2Y23 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_left]
set_property LOC  URAM288_X2Y31 [get_cells $SLR0_DPU_V3_TOP/core_array[3].u_core/u_buf_ppe/u_buf_img/gen_img_bank_grps[2].gen_normal.u_buf_ram_bank_grp_i/gen_banks[7].gen_normal.u_buf_ram_bank_128bx4k_1r1w1c_i/URAM288_right]
